1. Field of the Invention
The present invention relates to a semiconductor device packaging technique and, more particularly, to a semiconductor device having a structure in which a plurality of semiconductor elements can be stacked while electrically connected to each other, and a manufacturing method therefore.
2. Description of the Related Art
Some of semiconductor devices comprise a plurality of semiconductor chips (semiconductor elements), and these semiconductor devices are generally called multichip packages or multichip modules. Semiconductor devices having the multichip structure include chip-stacked semiconductor devices in which a plurality of semiconductor chips are stacked and mounted. In order to obtain the chip-stacked semiconductor device, there have been proposed many techniques of stacking a plurality of semiconductor devices (packages or modules) in each of which one or a plurality of semiconductor chips are mounted. These techniques are disclosed in, e.g., Jpn. Pat. Appln. KOKAI Publication Nos. 2002-134653, 2002-170906, 2002-184796, 2002-170921, and 2002-305364.
A chip-stacked multichip package (multichip module) is fabricated by stacking a plurality of semiconductor packages (semiconductor modules) by, e.g., the following fabrication method. First, packages are fabricated as individual packages for respective layers. Then, the packages are stacked into one multichip package, and a lower interconnection (lower connecting terminal) for mounting the package on a packaging substrate is provided on the lowermost package. When other electrical components and the like are to be mounted on the package, an upper interconnection (upper connecting terminal) is provided on the uppermost package. Alternatively, the lowermost package is fabricated in advance as a substrate package having a structure dedicated to package a substrate, or the uppermost package is fabricated in advance as a component package having a structure dedicated to package a component.
This technique hardly increases the production efficiency of all packages because packages are fabricated as individual packages for respective layers. The equipment cost may rise due to, for example, the necessity of assembly equipment dedicated to each package. High equipment cost increases the production cost of each package. This leads to high production cost of the whole multichip package of stacked packages and high production cost of a semiconductor device having the multichip package.